This invention relates to a CMOS VCO architecture for integrated circuit applications, including data communications. More particularly, the invention concerns a CMOS VCO in the form of an oscillator including a plurality of variable delay elements in which the delay through each variable delay element may be varied in response to a differential control signal produced by a control circuit.
The design of phase-lock loops for implementation in integrated electronic circuits (ICs) always includes a voltage controlled oscillator (VCO) that converts an input voltage to a signal having a frequency linearly dependent on the magnitude of the voltage. Typically, the VCO in an integrated circuit comprises a monolithic amplifier section with a resonant circuit external to the amplifier or a fully integrated solid state device, such as a ring oscillator, that does not include a resonator with reactive components.
Metal-oxide semiconductor (MOS) technology is virtually the standard for digital circuits that are used for computers and telecommunications. Increasingly, CMOS (complementary MOS) technology is utilized in these applications. CMOS technology incorporates both n-channel MOS and p-channel MOS transistors in the same monolithic structure.
Given the increasing use of CMOS technology for computer and telecommunications applications, VCOs in the form of fully integrated, solid state CMOS devices, such as ring oscillators, have been well received. See for example the current-starved inverter configuration set forth in N. E. Weste, et al., PRINCIPLES OF CMOS VLSI DESIGN, 2d Ed., 1993, at page 336. This CMOS VCO may exhibit instability in oscillation, and has a maximum frequency of operation in the MegaHertz range. Particularly desirable would be a CMOS VCO suitable for Gigahertz applications, with stable oscillation, in which current-controlled differentially-operated variable delay stages are provided with increased voltage headroom.